I am working on a real-time data acquisition and processing system.
Data is received continuously.
I am using BTpipes to transfer data.
I was wondering how long the delay is between USB packets (not blocks) before the MCU attempts to read the FPGA again.
I have written a dual buffer swapping controller.
Everything works perfectly (able to get 33MB/sec rates with no data corruption), except when crossing a boundary between packets.
For example, suppose I request a 1MB transfer size.
Then 1MB packet size works great.
However, 512kB packet size gives me a timeout error (ERRORcoDE = -2)
2MB transfer size does not work with 1MB packet size either.
Everything works only when transfer size and packet size are equal.
My buffer controller will fail when the delay between the previous block read and the next block read is too long.
Everything seems to work perfect as long as there is just one packet.
So I am wondering if there is a very long delay between packet reads or packet formation etc…