Creating a forum to discuss Vivado/AXI with OK HDL endpoint development


#1

Hi:

I’d like to propose starting a forum thread that focuses and shares any development and ideas around coding, development within the Xilinx Vivado suite as well as interfacing OpalKelley HDL endpoints to the FPGA 7 series AXI system.

Peter


#2

I think you just did. :slight_smile:


#3

Hi:

I think what I’m asking for is a ‘category’ tag. The whole toolchain methodology changes with Vivado and the 7 series chipsets.

Peter


#4

Gotcha. We’ve created a new Xilinx 7-Series category.


#5

Thanks… Heading over there.