I am trying to blink an LED on a new XEM7310MT-A200 board that I just bought. In order to blink the LED I am using a clock divider circuit that converts a 200MHz clock to a 1Hz signal using a counter that counts up to 99999999 which then inverts a register which is assigned to my LED. This causes the LED to be on for 0.5 seconds and off for 0.5 seconds.
My code is running fine in simulations but when I load the bitstream to the board using FrontPanel, all the LEDs remain on while the LED that I assigned to the 1Hz signal is noticeably brighter than the rest. I am wondering if I assigned the pins incorrectly or have another I/O setting that is wrong.
When I assigned my pins I downloaded the XEM7310MT constraints file from Opal Kelly’s website and only uncommented the following lines:
create_clock -period 5.000 -name sys_clk [get_ports clk]
set_property PACKAGE_PIN A13 [get_ports divided_clk]
set_property IOSTANDARD LVCMOS15 [get_ports divided_clk]
The first line was used to assign the system clock to the input port “clk” in my module. The second line was “led0” that was assigned to the output of my module which uses the variable “divided_clk” while the last line set the led voltage to 1.5V.
I also defined the input clock as a LVCMOS25 signal and the output divided clock (assigned to the LED) as a LVCMOS15 signal in Vivado. Something I noticed was Vivado assigned pin U20 to my clk input and pin A13 to my output divided clock. Neither of these pins are defined on the XEM7310MT pin reference which I believe is part of the problem (I would attach an image but new users aren’t allowed).
I have been troubleshooting this for hours and I can’t find my issue. This is my first time using an external constraints file so any feedback on what I did wrong would be greatly appreciated.