I am trying to implement a design using a buffered pipe in, a buffered pipe out and a wire in. The wire in is an enable signal that connects the input to the output. My C file does not work. The file is:
#include
#include
#include
#include
unsigned char buf1[2];
unsigned char buf2[2];
using namespace std;
int main ()
{
// Create an instance of the okCUsbXEM3001v2.
okCUsbXEM3001v2 *xem = new okCUsbXEM3001v2();
// Open the first available device.
xem -> OpenBySerial();
// Configure the PLL using the stored EEPROM settings.
okCPLL22150 pll;
//This method retrieves the current PLL configuration from the on-board XEM EEPROM.
//The pll object is then initialized with this configuration.
xem -> GetEepromPLLConfiguration(pll);
//Configures the on-board PLL via the I2C bus using the configuration information in
//the pll object
xem -> SetPLLConfiguration(pll);
// Download a configuration file to the FPGA.
xem -> ConfigureFPGA(“top_module.bit”);
xem->SetWireInValue(0x03,0xff);
xem->UpdateWireIns();
buf1[0]=‘8’;
buf1[1]=‘2’;
cout <<< WriteToPipeIn(0x9c, 2, buf1);
//Read 2 bytes from PipeOut 0xA0.
xem -> ReadFromPipeOut(0xa3, 2, buf2);
cout <<<buf2;
}