I want to supply bank 3 with 2.5V so I can use LVDS transmitters and internal termination for LVDS receivers. I understand that I would have to remove FB2 to break the connection to the 3.3V supply. My question is, how much current could I steal from the Vaux regulator and do you see anything wrong with doing that?
Thanks,
Klaus
Hello Klaus–
First, let me state that the XEM3005 has not been designed with LVDS as a functional goal. You will be able to supply 2.5v to the bank 3 VCCO, but the traces on-board are not impedance controlled nor are they differentially matched or even routed as pairs.
The XEM3010 is better for LVDS by design because the pairs were routed with regard to LVDS usage and the board itself is impedance-controlled.
The VCCAUX regulator is rated to 250mA. However, it supplies the clean power to the VCCAUX portion of the FPGA which supplies the on-board DCMs. It is generally not recommended to power the DCMs and I/Os with the same supply because the I/Os can dirty a supply and therefore degrade performance of the DCMs.
If you absolutely must do this, however, the VCCAUX regulator output is available on JP4-70 (the JTAG 2.5v reference)
FYI,
I managed to run LVDS receivers at 750 Mb/s despite the non-optimized layout.
This was even using an unmodified carrier board which makes things quite a bit worse. I made sure to only use pairs that were routed on the same side of the carrier board and not to drive any wires that are adjacent.
Pretty good considering the part is only spec’d to run up to 622 Mb/s…
That’s great! Thanks for the feedback.
Of course, keep in mind that specs are only as good as their conditions. For example, the SDRAM on the XEM3010/XEM3005 is specified to 133 MHz, but we’ve run it clear up to 170 MHz without errors. Of course, this is at room temperature and the device is specified well beyond that.
Within a speed grade, the FPGAs also vary somewhat for their capabilities.