Any constraint on okTriggerOut.ep_clk


In my design, TriggerOut.ep_clk is assigned to a clock source which will stay low during reset. When reset, the host receive TriggerOut events even continuously when the ep_trigger are all zero during reset.

If I change ep_clk to a free run clock, then it’s ok.
What’s the limition of ep_clk ?

Thank you



I’m not sure what could cause an okTriggerOut module to record an incoming event when the ep_clk isn’t running.

However, are you calling UpdateTriggerOut between IsTriggered checks?

UpdateTriggerOut retrieves the trigger status of every triggerOut endpoint in your design to a local register. IsTriggered simply checks the values for you and returns a boolean. IsTriggered doesn’t reset the trigger status (I don’t believe), UpdateTriggerOut does. If you want to know if another trigger event happened, you have to call UpdateTriggerOut again.

In other words, if you had a single trigger at endpoint 0x60, bit 0, then called UpdateTriggerOut, and then tested IsTriggered(0x60, 0x0001) repeatedly, it would always test true until you called UpdateTriggerOut. At least, this is my understanding of things.

Of course, this might not be your problem. If it’s not, perhaps you can call UpdateTriggerOut twice after your ep_clk reset to clear any triggers that may occured during reset?

I’m sure Jake could shed more light on this–he’s out of town but will be back soon.


Hello Garrick,

Thank you.
Actually, I set up an event handler to catch the TriggerOut events.
In the WM_TIMER handler, I call UpdateTriggerOuts. I the event handler, I check events for EP address and mask to see if any bit is set.

In my test, I set ep_trigger and ep_clk to 0 when reset( a button assigned ). Then I get TriggerOut events repeatly.
Then I changed the Verilog code to make ep_clk a free run clock. In such case, the event will not be triggered when reset.




I used the new ModelSim libraries (in the alpha release of FP 1.3) to simulate this situation and the issue jumped out immediately.

Since the TriggerOut module functions synchronous to the ep_clk, it needs a clk to process an update to the trigger out latch.

So, as soon as your clock dies, so does the operation of the TriggerOut. Even if there is an UpdateTriggerOut called, the triggerout value remains the same as the value held when the clock stopped; those triggers are frozen in time. It’s not detecting new events - it has the old ones still present.


Indeed-- the Trigger In/Outs are defined as synchronous modules. Therefore, they require clocks. The Wire In/Out would be more suitable in a situation where a clock is not available.