Access to differential termination for XCLK1/2


#1

I have an application that uses (relatively) low-speed LVDS inputs to the FPGA. Page 16-18 of the XEM3010 User’s Manual (Rev 20060802) does an excellent job of identifying options for termination: available pads for DCI VRP/VRN resistors for I/O banks 2 & 3, and a method for customizing the Vcc bank voltage.

I would also like to use XCLK1+XCLK2 as a differential input, but unfortunately it is in bank 0. Assuming there is other stuff in the bank that precludes using DCI VRP/VRN resistors for bank 0, is there any possibility of finding a spot on the XEM3010 where I could sneak in a single external 100 ohm terminating resistor between XCLK1 + XCLK2 (eg. FPGA pins E10 & F10)?

Thanks!


#2

Is there any spot I can pick up 2.5V from the front side of the XEM3010? I can do the wiring I need on the BRK3010 board, but I’d prefer if I could do it directly on the XEM3010. I know I can get 2.5V from pin1 of the JTAG connector, but I’m looking for a “better” spot (eg. one end of a large decoupling cap?).

Also, what are R8 and C26 for (bottom side of module PCB)?

Thanks.