XEM7350 : how to get USB3.0 Superspeed with the stock pipeTest demo


#1

@ O-K and everyone,
We just got our XEM7350 board, and ran the provided pipeTest demo on it. The pipe read/write speed we got is about 43.28 MB/s The host is a linux pc with the USB3.0 ports. I am wondering if there is something we have missed in setting up the PC/OS in order to get the 400MB/s speed it is supposed to do ? Any hint ? Thanks
H.M.


#2

Your USB 3.0 ports are (for some reason) likely running at only HighSpeed rates. You might want to try a different PC, different ports, or check your Linux installation to confirm the speed of those ports.

The XEM7350 works at super speed on Mac, Windows, and Linux. It will not, however, achieve 400 MB/s. Our testing indicates speeds in the 340 MB/s range are achievable depending on a number of factors.


#3

Thanks for responding. Beside the host/OS, is there any custom setting setting such as the PLL we should use for USB3.0 ? We are using the stock C++ application from Samples directory to run the pipeTest demo. Anything there we need to change ? Thanks again.
H.M.


#4

okay, the problem has been resolved. The host PC we previously used was a weak one. Swapping it out with a normal PC, the pipe transfer speed increased to
364.37 MB/s / 209.03 MB/s

That is more like it. Thanks for the help.


#5

Those are nice transfer rates. We’ve come a long way in recent years. People sometimes fail to recognize just how much data 364.37 MB/s really is. :slight_smile:


#6

Hi,

These are nice numbers. 364.37MB/s and 209.03MB/s. I assume one is for XEM7350 to PC, the other is for PC to XEM7350. I have a follow-up question. In my application I would like to record the data from a high speed ADC to HDD of the PC. I cannot tolarate any data loss, i.e. the recording of the ADC data has to be gapless. The ADC will keep sending the bits in a continous manner. Is it possible to do that using XEM7350 assuming the PC is not limiting the process in any way. The data rate of the ADC is 133.33MSPS x 16 bits.


#7

I would say in principle yes, as the data rate of your adc is only about 1/20 of the USB3.0 speed, and using a big FIFO between the adc and the usb end-point would be a solution. But, the size of the FIFO could pose a limitation. Say your adc data is 14-bit wide, and thus the FIFO would be filled at the input end at a rate of ~10M-WORD/s, and say the largest FIFO you could implement in the FPGA is 100k-WORD deep. The FIFO would be full in every 10ms. In other words, your PC software will have to empty the FIFO at an 100Hz frequency. So this is the constraint, and your software guy can tell whether his software implementation could handle it. HTH


#8

akaya-- The rate you’re after is about 267 MB/s. This is well below the maximum rates we have achieved with our USB 3.0 products (which all transfer at the same rate).

You should be able to maintain this rate, but much will depend on your PC. You’ll need to make sure the operating system will not interrupt your process for more time than is required to pull in the data that could be buffered. You will also want to make sure you use the on-board SDRAM as a large memory buffer to keep things moving.

One small correction, this is not 1/20 the speed of USB 3.0. USB 3.0 has a signaling rate of 5 Gbps, but this is well above the actual achievable rate due to overhead. For starters, the 8b10b encoding lops this off to an effective rate of 4 Gbps. (every 8 bits of data is converted to a 10 bit symbol that is sent over the physical interface). That leaves a theoretical maximum of 500 MB/s but that doesn’t consider any protocol overhead, etc.


#9

Thanks for the correction. Now I see the ADC data rate is 133MBPSx16-bit, not 133Mbps that I used to get the 1/20 figure.


#11

We have lots of customers doing all sorts of DAQ and analysis using our USB 3.0 products. Bandwidth of USB 3.0 is very impressive. But it’s best with modern motherboards, chipsets, and operating systems.


#12

Like okSupport said, using these xem modules for DAQ and dsp applications is very common. I am actually kind of curious about your experience of using the xilinx pcie core for data transmission between the fpga board and the host. What PC software and driver do you use for handling the pcie, and any demo code available ?


#13

We are using a modified version of OpenCores PCIe SG DMA controller. It is available here: http://opencores.org/project,pcie_sg_dma