The ports you have mentioned were added with the XEM7305 to ensure that all connections between the USB interface and the FPGA were enumerated. The okRSVD signals are completely unused and can be ignored in the simulation. These signals connect to the okHost module (contained in okLibrary.v), but are not used inside of it. We connect them to the okHost in case of potential future use but as of this post they are unused and will not affect a simulation.
The okHU[3] signal is also unused, but tied high. This is only connected in the HDL for future use and can be safely ignored for simulation.
If these signals are eventually used in the host interface the simulations will be updated to reflect this.
We apologize for the confusion, we’ll look for a way to better communicate this.