I have a problem using SDRAM in XEM6310.
I generated SDRAM MCB(Memory Control Block) using Xilinx MIG with the information provided by XEM6310 manual.
I’m pretty sure I generated it properly.
The problem is that a pin(Y12) for MCB’s system clock(cyc_clk_n) is already occupied by okUH as you can see below :
NET “okUH” LOC=“Y12” | IOSTANDARD=“LVCMOS18”;
NET “c3_sys_clk_n” LOC = “Y12” ;
I couldn’t find any substitute pin for Y12.
Is there any alternative option for okUH or c3_sys_clk_n?
I would be glad with any suggestions.