Some issues about the data collection performance
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0
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1814
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March 12, 2014
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Problem updating/reading values on a WireOut
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7
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2823
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February 17, 2014
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BTPipeOut with FIFO
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3
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3058
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January 28, 2014
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Xem6310mt
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1
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1742
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January 21, 2014
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Different behavior when connected to USB 2.0 or USB 3.0 PC
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1
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1915
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January 16, 2014
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Xem-6310 usb 3.0
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5
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2199
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January 16, 2014
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PipeTest example - virtual FIFO
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0
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1926
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December 27, 2013
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Uncompatible netlist files
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2
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1691
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December 17, 2013
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Behavior of BTPipeOut
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1
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1697
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December 13, 2013
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Logic Analyzer project
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6
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2089
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September 1, 2013
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XEM6310 boards won't configure from flash if flash is being accessed at startup
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1
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1367
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August 30, 2013
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Throughput of the DES application using Python
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3
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1621
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July 18, 2013
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System flash data rates
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1
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1371
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May 9, 2013
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Isochronous transfer mode
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2
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1461
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April 22, 2013
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Minor nit about okHostClk in UCF file
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0
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1244
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April 16, 2013
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Multiple OK boards being accessed from the same application
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6
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1559
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April 10, 2013
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Throughput benchmarks, how were these measured?
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3
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1554
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April 4, 2013
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Multiple Asyncronous Pipes?
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2
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1358
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March 22, 2013
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Is there a way to speed up the FPGA configuration from System FLASH on XEM6310-LX150
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4
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1464
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February 14, 2013
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XEM6310 does not seem to work on my Windows 7 desktop which only has USB 2.0 ports
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2
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1241
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January 21, 2013
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XEM6310 sys_clk4/5, mistake in doc?
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3
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1489
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January 15, 2013
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xem6310.ucf, xem6310mt.ucf, xem6320.ucf?
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1
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1481
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January 15, 2013
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Xem-6310 usb 3.0
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4
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1655
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December 13, 2012
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