Number of flip flops

Xilinx FPGA
1

Hi all.
I was wondering is there any way to see number of flip flops per module after synthesis and implementation in Xilinx ISE? I see different parameters on module level utilization like number of LUTs. SLICEs, LUT RAM, etc. I checked every report but I can’t find it anywhere. :confused: It’s a virtex 5 chip.
Thanks.