FrontPanel problems after load bit file

I have been experiencing a strange problem. I have a bit file that I generated in xilinx. It was generated the same way I have generated many other bit files for Opal Kelly products. For some reason this bit file causes problems with FrontPanel. When I load the bit file through Frontpanel it says it loads fine but then Frontpanel gets very slow and hangs for long periods of time. I have also noticed that the PLL settings frontpanel shows me change after I load the bit file. The xilinx project uses all of the same support files as other projects I have built that have no problems. Im running frontpanel 4.2.5 the project is targeting an XEM3010-1500. When I power cycle everything start over again fine until I load this one particular bit file. Any ideas?

I just figured out what was wrong. I didnt generate the code but was merely working with it. The person who coded it had commented out the I2C pins in the ucf. I put them back and and tied to ‘Z’ in the vhdl. now all is well.

— Begin quote from ft1;4200

I just figured out what was wrong. I didnt generate the code but was merely working with it. The person who coded it had commented out the I2C pins in the ucf. I put them back and and tied to ‘Z’ in the vhdl. now all is well.

— End quote

Hi all,

I am bit new to XEM 6001 Opal Kelly board. I am wondering about the followings.

1- FrontPanel supports VHDL programming ?
2- It is possible to use VHDL in FrontPanel ?
3- Can FrontPanel generate bit file which could be downloaded in on-board flash memory ?

Best regards,
Bilal