ERROR:NgdBuild:604 - logical block 'ep20' with type 'okWireOut' could not be
resolved. A pin name misspelling can cause this, a missing edif or ngc file,
case mismatch between the block name and the edif or ngc file name, or the
misspelling of a type name. Symbol 'okWireOut' is not supported in target
I am using ISE Design Suite 14.7 64-bit windows. And I tried to work with the VHDL and Verilog samples but encounted the above error with all the samples. This error also occurs with all the 'ep' series port mapping
Who can tell me whats going on...