Dear all,
I trying to debug with ISE chip scope the system I designed on a XEM3005.
This was designed to communicate through the USB with a labview GUI runnning on a PC, so I wrote a C code that initiate both the PLL for the clock I need and the FPGA, by downloading the bit file.
The above mentioned GUI provides that after FPGA initialization, a number of user defined parameters are downloaded into the FPGA.
What I want to do is to check whether data are correctly downloaded or not.
ChipScope is the best way to do it but I do not know how to do it. In fact, once the jtag link is established the bit file is also downloaded. At this point I cannot communicate from the GUI with the FPGA anymore.
Anyone has ever had a similar issue?
kind regards
Gian Nicola