Hello,
I have trouble with block throttled out pipe transfers. For my first steps with the XEM6010-LX45 I’m using a block throttled out pipe to transmit counter values over USB.
I’m writing 16 values into a FIFO. After writing these values the counter is reset. The width of the data in bus is 32 bit. This FIFO is directly connected to a okBTPipeOut component (EP_READ is connected to the FIFOs RD_EN).
Is it correct that I read 164 bytes via ReadFromBlockPipeOut(0xA0, 164, 16*4, buf) for emptying the endpoint?
Anyway, in a loop I’m doing the call: dev->ReadFromBlockPipeOut(0xA0, 164, 164, buf);
When displaying the read data I see the following error:
(…)
PipeOut Transfer no. 5, read_bytes=64=
0 0 0 0
1 1 1 1
2 2 2 2
3 3 3 3
4 4 4 4
5 5 5 5
6 6 6 6
7 7 7 7
8 8 8 8
9 9 9 9
10 10 10 10
11 11 11 11
12 12 12 12
13 13 13 13
14 14 14 14
15 15 15 15
PipeOut Transfer no. 6, read_bytes=64=
0 1 1 1
3 1 3 3
2 3 2 3
3 3 3 3
4 4 4 4
5 5 7 5
6 6 6 6
7 7 7 7
8 8 8 8
9 9 9 9
10 10 10 10
11 11 11 11
12 12 12 12
13 13 13 13
14 14 14 14
15 15 15 15
(…)
After some Transfers, like here in the sixth (first, second and third row), there are errors that actually cannot be explained because of incorrect write operational into the FIFO. The counter is connected to the DIN bus by concatinating 4 8-bit counter values. Timing errors also shouldnt be the problem here.
I guess that in the communication between FIFO and okBTPipeOut itself there should be something inccorect. Do you have any idea?
The FIFO has a read latency of 1.
By the way, I’m using ISE 14.6. The suplied ngc netlists are generated with ISE 13.1. Is there perhaps an incompatibility problem?
My frontpanel version is 4.2.6
Regards,
Jan