I found a mistake on the BRK5010 breakout board. Signals from the XEM5010 JP2 pins 90 and 92 (FPGA pins AE26 and AD26) did not get routed to header JP2C on the breakout board. The remaining even numbered signals on JP2 pins 94-108 were routed to JP2C pins 90-104 (in other words, they were shifted up by two pins). You can clearly see the mistake on the schematic on page 20 of the XEM5010 User’s Manual.
It looks like you’re absolutely correct.
Of course, we will need to get this fixed. We apologize for any inconvenience this has caused, but thank you very much for reporting it!
Am I correct that AF15 and AE15 are routed to JP2C-102 and JP2C-104 respectively?
Yes. According to the XEM5010 User’s Manual, page 18, the BRK5010-JP2C-102 and BRK5010-JP2C-104 are attached to XEM5010-JP2-106 and XEM5010-JP2-108.
Then, by page 24, these two pins are AF15 and AE15 on the FPGA.
Thanks, I am also having a problem getting FPGA output signals to JP2C_83 and JP2C_84. I have them mapped to AB19 and AA19 respectively, but nothing is coming out. Are these the correct FPGA pins for connector pins JP2C_83 and JP2C_84?
Yes, I believe those should be just fine. Can you check board continuity? Have you confirmed the pad mapping with the pad text file produced from the tools?